美國專利-2
No.Patent NameCountryPatent No.
1 Method for manufacturing a Super-junction structures having implanted regions surrounding an n epitaxial layer in deep trench
US 9,530,867
2 Super-junction structures having implanted regions surrounding an n epitaxial layer in deep trench
US 9,099,320
3 METHOD OF MAKING A TRENCH MOSFET HAVING IMPROVED AVALANCHE CAPABILITY USING THREE MASKS PROCESS US 8,222,108
4 Super-junction trench MOSFETs with short terminations
US 8,999,789
5 Trench MOSFET with improved trench gate contact US 8,269,273
6 Super-junction trench MOSFETs with short terminations
US 9,000,515
7 Avalanche capability improvement in power semiconductor devices using three masks process
US 9,018,701
8 Ldmos With Double Ldd And Trenched Drain US 8,314,000
9 SUPER-JUNCTION TRENCH MOSFET HAVING DEEP TRENCHES WITH BURIED VOIDS US 8,575,690
10 屏蔽閘極金氧半場效應電晶體及其製造方法(Shielded gate MOSFET and fabricating method thereof)
US 10,700,175
11 Trench Mosfet Having Floating Dummy Cells For Avalanche Improvement US 8,680,610
12 TRENCH MOSFET WITH TRENCHED FLOATING GATES HAVING THICK TRENCH BOTTOM OXIDE AS TERMINATION US 8,759,910
13 Super-junction trench Mosfet structure
US 9,293,527
14 SEMICONDUCTOR POWER DEVICE HAVING WIDE TERMINATION TERNCH AND SELF-ALIGNED SOURCE REGIONS FOR MASK SAVING US 8,686,468
15 TRENCH METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH MULTIPLE TRENCHED SOURCE-BODY CONTACTS FOR REDUCING GATE CHARGE US 8,704,297
16 TRENCH MOSFET LAYOUT WITH TRENCHED FLOATING GATES AND TRENCHED CHANNEL STOP GATES IN TERMINATION US 8,487,372
17 TRENCH METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH EMBEDDED SCHOTTKY RECTIFIER USING REDUCED MASKS PROCESS US 8,723,317
18 FAST SWITCHING LATERAL INSULATED GATE BIPOLAR TRANSISTOR (LIGBT) WITH TRENCHED CONTACTS US 8,598,624
19 METHOD FOR MANUFACTURING A POWER SEMICONDUCTOR DEVICE US 8,563,381
20 AVALANCHE CAPABILITY IMPROVEMENT IN POWER SEMICONDUCTOR DEVICES US 8,384,194